1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a field-effect transistor having a heterostructure of a Gallium nitride-based semiconductor which is generally represented as InxAlyGa1xe2x88x92xxe2x88x92y N (where 0xe2x89xa6Xxe2x89xa61, 0xe2x89xa6Y less than 1).
2. Description of the Related Art
A Gallium nitride-based semiconductor such as GaN, Al-GaN, InGan, InAGaN or the like has high dielectric breakdown field, high thermal conductivity and a high electron saturation velocity, and thus is promising as a material for a high-frequency power device. Particularly in a semiconductor device having an AlGaN/GaN heterojunction structure, electrons accumulate at a high density in a heterojunction interface between AlGaN and GaN, and a socalled two-dimensional electron gas is formed. This two-dimensional electron gas exists in a spatially separated state from donor impurities added to AlGaN, and thus shows high electron mobility. A field-effect transistor having such a heterostructure is produced so that source resistance can be reduced. Moreover, a distance d from a gate electrode to the two-dimensional electron gas is typically as short as tens of nm, and thus, even if a gate length Lg is as short as about 100 nm, the ratio of the gate length Lg to the distance d (i.e., aspect ratio) Lg/d, can be increased from 5 to about 10. Accordingly, semiconductor devices having a heterostructure have a superior feature in that a field-effect transistor which has an insignificant short-channel effect and satisfactory saturation property can be readily produced. Moreover, a two-dimensional electron of the AlGaN/GaN-based heterostructure has an electron velocity in a high field region of about 1xc3x97105 V/cm, which is twice or more than the speed of AlGaAs/InGaAs-heterostructure currently prevalent as a high-frequency transistor, and thus, is expected to be applied to high-frequency power devices.
A conventional semiconductor device 900 is shown in FIG. 9. The semiconductor device 900 is formed on a sapphire substrate or SiC substrate 901, on which the following layers are sequentially laminated: a buffer layer 902 including GaN; a channel layer 903 formed of GaN or InGaN; and an electron donor layer 904 including AlGaN. A source electrode 906, a gate electrode 907 and a drain electrode 908 are provided on the electron donor layer 904.
This AlGaN/GaN-based heterostructure is typically formed on a sapphire substrate or SiC substrate 901 composed of a (0001) facet (c facet), through a crystal growth process using a metal-organic chemical vapor deposition method or a molecular beam epitaxy method. In the case of forming the buffer layer 902 including GaN on the sapphire substrate or SiC substrate 901, it is necessary to thickly form the buffer layer 902 in order to account for a great difference in lattice constant between the substrate 901 and the buffer layer 902. This is because the strain due to a lattice mismatch between the buffer layer 902 and the substrate 901 is sufficiently reduced by forming the buffer layer 902 so as to have a relatively large thickness. By forming the electron donor layer 904 containing AlGaN to which n-type impurities such as Si or the like are added so as to have a thickness on the order of tens of nm on this thick buffer layer 902, a two-dimensional electron gas (i.e., channel layer 903) is formed in the buffer layer 902 which has a great electron affinity in the heterointerface between AlGaN and GaN due to the effects of selective doping. The crystal facet of a heterostructure formed by an MOCVD (metal-organic chemical vapor deposition) method, is typically composed of a facet of Ga, which is an III group element. This two-dimensional electron gas is susceptible to the effects of piezo-polarization in a c axis direction due to tensile stress imposed oni AlGaN, in addition to a difference in spontaneous polarization between AlGaN (included in the electron donor layer 904) and GaN (included in the buffer layer 902). Thus, electrons accumulate at a density which is higher than a value which would be expected from the density of the n-type impurities added to the electron donor layer 904. When Al composition of AlGaN of the electron donor layer 904 is 0.2 to 0.3, electron density of the channel layer 903 is about 1xc3x971013/cm2, which is about 3 times the density of a GaAs-based device. Since the two-dimensional electron gas of such a high density is accumulated, the semiconductor device 900 used as a GaN-based heterostructure field-effect transistor (FET) is considered as a highly promising power device.
However, the conventional semiconductor device 900 has a number of problems as follows: (1) due to the imperfectness of crystal growth techniques and their associated processes, a satisfactory crystal can not be obtained; and (2) in the case of involving an etching process, the device properties may be deteriorated due to damage inflicted by the etching process, and thus, the expected power characteristics may not be sufficiently realized.
One of the problems related to the crystal growth is associated with the fact that the undoped GaN included in the buffer layer 902 typically represents an n-type and the carrier density may be as high as about 1016/cm3 or more. This is presumably because the constituent nitrogen (N) atoms are released during the crystal growth, and thus, vacancies are liable to be formed. When there are such residual carriers, the leakage current component via the GaN buffer layer 902 of the device becomes greater. In particular, when operating the device at a high temperature, deteriorations in the element properties such as aggravation of pinch-off characteristics may occur. As for an isolation problem, when forming a plurality of GaN-based heterostructure FETs on the same substrate, the FETs interfere with each other to hinder normal operation. When the gate electrode 907 is further provided above this GaN buffer layer 902, a problem such as an increase of a gate leakage current, a drop in the voltage breakdown level of the device or the like may arise.
As for problems associated with etching process technique, a facet of GaN (included in the buffer layer 902) or AlGaN (included in the electron donor layer 904) may be damaged. Since GaN and AlGaN are difficult to remove or trim by means of wet etching, dry etching is typically performed for the etching process. However, a leakage current is likely to flow in the surface of the buffer layer 902 or the electron donor layer 904 due to the damage inflicted on the surface of the buffer layer 902 or the electron donor layer 904. It is considered that in particular, shortage of nitrogen on the surface increases the conductivity of the surface of the buffer layer 902 exposed by the etching, thereby increasing the leakage current.
In one aspect of the invention, a semiconductor device includes: a substrate; a buffer layer-including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer, wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAIN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer;
and a gate electrode formed at least a portion of which is in contact with the cap layer.
In one embodiment of the invention, at least a portion of the gate electrode may be formed so as to contact the electron donor layer.
In another embodiment of the invention, the gate electrode may be formed on the cap layer.
In still another embodiment of the invention, the cap layer may include InGaAlN, the cap layer may have a composition which is substantially lattice matched with the buffer layer in a c facet and the electron donor layer may be formed so that an absolute value of a magnitude of a polarization occurring within the cap layer is smaller than that of a magnitude of a polarization occurring within the electron donor layer.
In still another embodiment of the invention, an n-type impurity may be added to part or whole of the cap layer.
In still another embodiment of the invention, the gate electrode may be positioned closer to the source electrode than to the drain electrode.
In still another embodiment of the invention, the gate electrode may have a surface area which is larger than that of the cap layer.
In still another embodiment of the invention, the gate electrode may be positioned in a region where the cap layer is reduced in thickness or removed.
In still another embodiment of the invention, the gate electrode may be formed on a side of the cap layer closer to the source electrode, and the cap layer may be formed between the gate electrode and the drain electrode.
In still another embodiment of the invention, the cap layer may include a semiconductor layer formed on the electron donor layer and an insulating film formed on the semiconductor layer.
The present invention having the above-described structure enhances a barrier height of Schottky junction, thereby providing a semiconductor device, which is capable of: reducing the leakage current as well as preventing an increase of the source resistance; and/or improving the voltage breakdown level as well as preventing an increase of the source resistance. Moreover, a region occupied by a cap layer between a gate electrode and a drain electrode is made larger. Such a structure allows the voltage breakdown level of a semiconductor device to be improved.
In one aspect of the invention, a semiconductor device includes: a substrate; a buffer layer including AlGaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of N atoms; an electron donor layer including AlGaN formed on the buffer layer, wherein: surfaces of the electron donor layer are c facets of N atoms; a channel layer including GaN or InGaN formed on the electron donor layer, wherein: surfaces of the channel layer are c facets of N atoms; a source electrode and a drain electrode formed on the channel layer; a cap layer including AlGaN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of N atoms and at least a portion of the cap layer is in contact with the channel layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.
In one embodiment of the invention, the gate electrode may be formed so that at least a portion of which is in contact with the channel layer.
In another embodiment of the invention, the gate electrode may be formed on the cap layer.
In still another embodiment of the invention, the gate electrode may be positioned closer to the source electrode than to the drain electrode.
In still another embodiment of the invention, the gate electrode may have a surface area which is larger than that of the cap layer.
In still another embodiment of the invention, the gate electrode may be positioned in a region where the cap layer is reduced in thickness or removed.
In still another embodiment of the invention, the gate electrode may be formed on a side of the cap layer closer to the source electrode, and the cap layer may be formed between the gate electrode and the drain electrode.
In still another embodiment of the invention, the cap layer may include a semiconductor layer formed on the electron donor layer and an insulating film formed on the semiconductor layer.
The present invention having the above-described structure enhances a barrier height of Schottky junction, thereby providing a semiconductor device, which is capable of: reducing the leakage current as well as preventing an increase of the source resistance; and/or improving the voltage breakdown level as well as preventing an increase of the source resistance. Moreover, a region occupied by a cap layer between a gate electrode and a drain electrode is made larger. Such a structure allows the voltage breakdown level of a semiconductor device to be improved.
Thus, the invention described herein makes possible the advantages of: (1) providing a semiconductor device (GaN-based heterostructure FET) in which a surface leakage current caused by residual carriers resulting from defects or damage accidentally caused in the interior or surface of the GaN layer is significantly reduced; and (2) providing a semiconductor device (GaN-based heterostructure FET) having a reduced surface leakage current and improved voltage breakdown level.
These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.